CCS Timing modeling supports additional driver model complexity by using a time- and voltage-dependent current source with essentially an infinite drive resistance. The new driver model achieves high accuracy by not modeling the transistor behavior at all; instead it maps the arbitrary transistor behavior for lumped loads to that for an arbitrary detailed parasitic network.

​

The CCS Timing model greatly improves the receiver model accuracy. In this approach, the input capacitance of a receiver is dynamically adjusted during the transition by using two capacitance values. 

The driver model can be used with or without the receiver model.

​

CCS Driver Model

• CCS driver model is characterized by capturing current waveform flowing into the load capacitor of the cell.

• CCS driver model also has sensitivity to input transition time, output load and side input states.

• CCS driver model is essentially a current source with infinite driver resistance. It provides better accuracy in cases where net impedance is very very high.

• CCS timing model does not require synthesis of driver model, captured current waveform is driver model itself.

​

CCS Receiver Model

• CCS receiver model is characterized much like NLDM receiver model with additional granularity to reflect sensitivities

  •   miller capacitance

  •   state of side inputs

  •   input transition times

  •   output load.

• To accurately reflect effect of miller capacitance on input capacitance and net-delay.

​

CCS Noise Model

• Accurate model to support:

  •  Noise bump calculation

  •  Noise propagation

  •  Driver weakening (combination of propagated and injected bumps)

  •  Vdd and Temperature scaling

• Characterization should be fast and cover a broad set of cell types

• Model must enable efficient calculation in analysis and implementation tool.

​

CCS Power Model

• Address needs of Multi-Voltage designs.

  • Multi-Rail cells (Vdd, Vss)

  • Non-zero ground rail

  • MTCMOS (power gating)

• Static and dynamic rail analysis.

• Support accurate voltage (IR) drop calculation.

• Single library / model for all power related applications

• Fast and easy library characterization

• Switching current waveform for each power or ground pin

  • Finer time resolution

  • Full Multi-Voltage support

• Equivalent parasitics as seen from the power network

  • Allows fast yet accurate rail analysis

• Support for macro power modeling for memory and Mixed-Signal IP

• Unified library model for power optimization, power analysis, rail analysis.

​

​