Senior Application Engineer

JOB QUALIFICATION:
-  5+ years of experience in product validation of EDA software or capable fresh graduates. 
-  Knowledge of VHDL or Verilog, or SystemVerilog RTL languages for ASIC or FPGA design
-  Knowledge of C/C++ is required
-  Experience of ASIC or FPGA hardware design and implementation using RTL or HLS tool flows
-  Experience of RTL verification flows and methodologies
-  Knowledge of Digital Signal Processing would be an added advantage
-  Bachelor’s degree or its equivalent in electrical, electronic or computer engineering or a related scientific field
-  1 year design or application engineering experience in either an RTL or HLS implementation role (design, not verification)
-  Excellent written and verbal communication in English are essential

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JOB DESCRIPTION:
-  Work with the Sales Organization to drive pre and post-sales technical activities to sell and support customized Electronic Design Automation (EDA) tools.
-  Territory coverage includes primarily customers in Asia region.
-  Responsible for integrating with a broader team and communicating crucial status to a variety of stakeholders located in United States, India and other parts of the world
-  Analyze customer designs and knowledge to produce better design results and enable customer success
-  Assist with customer design and verification
-  Provide customer training on High Level Synthesis Products
-  Perform Beta testing and collaborate with R&D to drive product direction and capabilities of RTL power optimization and Formal Verification
-  Will require travel within China or other location in world for support and training purposes