Validation Engineer
The Static Model Team (SMT) delivers the industry’s most comprehensive and robust solution for characterization and validation of customers' foundation IP—from standard cells, I/Os, and complex multi-bit cells to memories and mixed-signal blocks.
JOB QUALIFICATION:
- 3+ years of experience in product validation of EDA software or capable fresh graduates.
- Proficient in TCL/Python/Perl/Shell scripts, with good scripting skills
- Ability to work independently and multi-task efficiently
- Experiences in Spectre/Hspice circuit simulation, library characterization, static timing analysis, and statistics analysis are a strong plus
JOB DESCRIPTION:
- Its patented Inside View technology delivers better correlation to silicon by improving library throughput and ensuring timing, power, noise, and statistical coverage of customers' IP.
-The successful candidate will assist in developing software validation plans to enhance product quality.
-The primary responsibility will be to support Liberate/PrimeLib regressions and ensure that the Liberate/PrimeLib build is ready for production for our key customers.
-The role involves feature testing and debugging regression or customer issues. A quick response and timely feedback on test results for advanced nodes are also required.
Let’s Work Together
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